1. Field of the Invention
This invention relates to discreet analog signal processing systems (DASP) and, more particularly, to a specific such system employing CCD devices configured for implementing a dual-CCD, real-time, fully-analog correlator.
2. State of the Prior Art
General requirements of digital analog signal processing (DASP) systems and relationship thereto of charge transfer devices (CTD) and specifically charge coupled devices (CCD):
In the prior art, digital signal processing (DSP) has been utilized in many applications in view of the low cost of the integrated circuits that are available to perform many functions in digital fashion. As compared with analog techniques, DSP has been preferred in that its use of digital implementation has been considered to be preferable in view of cost, weight, flexibility and accuracy considerations. By contrast, the only present advantage of analog techniques is its lower power consumption, which advantage may gradually disappear as technology advances. A further technique known as discrete analog signal processing (DASP) provides an alternative to the aforementioned methods of signal processing and is implemented by sampling at regular intervals an analog signal to provide a series of analog signals or samples, each of which may be operated upon one-at-a-time and have an amplitude containing information on data corresponding to M digital bits, where one bit of resolution in DSP is equivalent to 6dB dynamic range in the analog signal. Experiments have shown that a signal-charge analog packet can be shifted through a typical CTD nearly unattenuated, limited by the size of the holding wells and the minimum detectable output signal.
As more fully described in an article entitled "Charge Coupled Semiconductor Devices" appearing in Bell System Technical Journal, April 1970, by W. S. Boyle and G. E. Smith, CCD's sample an analog input signal to povide a series of discrete analog charge packets to be stored in potential wells created at the surface of a semiconductor and transported along the surface by timing signals. More particularly, these charges constitute minority carriers stored at the silicon-silicon dioxide interface of capacitors and are transferred from capacitor or well to capacitor or well on the same substrate by manipulating the voltages applied across the capacitor.
Practical applications of CCD systems however present various requirements, some among these being the ability of creating a basic building-block approach to the use of CCD processing devices to permit commercially feasible use of these devices in implementing complete systems having commercial appeal. Specifically, it must be made possible to achieve a compatable wedding of individual CCD subsystems to achieve a functioning and practical CCD system having commercial appeal and practicability.
CCD technology as well differs from prior art DSP technology and is only currently emerging as a possible, commercially feasible approach to implementing large, sophisticated systems. The inherent characteristics of CCD subsystems present certain operating requirements which must be considered in implementing a CCD system having a practical application, and it is therefore instructive to review these considerations at this juncture. For example, CCD analog signal processing depends upon the following device functions:
1. Linear signal (charge) injection with low noise insertion. This is of particular significance since the signal to be injected is a voltage signal and can give rise to noise in the injection operation if proper device structure and control functions are not achieved.
2. Precise signal (charge) transport delay with load dispersion (load transfer inefficiency, .epsilon.) and high dynamic range (charge handling capability and noise). In this context, again proper design and operation are of critical importance to achieve satisfactory results in the signal processing functions.
3. Recognizing that CCD devices are charge transport or charge coupled devices and require constant manipulation or constant propagation of the charge packets, it also will be appreciated that the capability of reading out the data, i.e. sensing the data represented by the charge packets, must be performed in a manner so as not to alter or affect the charge packet and hence the information content. This observation relates, for example, to the need to derive parallel outputs from a shift register through which the charge packets are propagating - some applications of course permitting destructive readouts such as in a serial readout (SI) mode. Where parallel outputs, for example, must be derived at tapped locations along a delay line as implemented by a CCD shift register, non-destructive readout (NDRO) of the analog signal at these tapped locations is of critical importance. In addition to the ability to read out the data non-destructively, it must also be recognized that any sampling function itself introduces noise, termed the Nyquist noise, especially at the signal amplitude levels involved in CCD technology and/or in relation to typical applications of CCD technology wherein signal to noise ratios of the signals to be processed are extremely low, it is of great importance to eliminate such sampling noise in the output. Elimination of that noise, however, will require a system compatible with sample and hold limitations.
4. Typical applications of CCD systems include linear transform operations wherein analog multiplicative weighting of the NDRO signal must be performed in relation to a second analog signal (or reference). A complete circuit, such as for repetitive inclusion in a correlator device must provide suitable buffering and mutliplying capability and must be capable of correcting for various device limitations including nonlinearities in bias levels inherent to CCD's. Where analog multiplicative weighting is required, the weighting cell must have the desired multiplier accuracy, linearity and speed of operation, and a fabrication requirement compatible with the associated CCD. It follows in such applications that a suitable source of the reference or multiplier level for the various weighting cells must be available independently. Such applications typically require, as well, a current summing amplifier -- again this device must be compatible and, for example, must have a sufficiently low impedance to prevent interaction between all the parallel weighting cells, must not present unacceptable "loading" and must provide adequate buffering for the output of the transform operator in supplying the CCD output to an "off-chip" use device.
The prior art has not afforded the necessary development of CCD technology on all of these necessary specific areas nor has it fully achieved the compatibility of existing systems for rendering large-scale system implementations practical in all respects. The present invention, on the other hand, is directed to achieving all those goals of CCD technology as set forth above and provides a practical implementation of a complex system, and particularly a dual-CCD, fully analog, real-time correlator having numerous practical applications. The system of the invention demonstrates a building block approach to the implementation of practical CCD systems and has substantial merit for that accomplishment as well. At this juncture, certain aspects of the prior art as relate to specific components or subsystems of the correlator system of the present invention are considered in somewhat more detail.